Although any micromechanical substrates are usable, the present invention and the problem on which it is based will be explained with reference to silicon-based MEMS wafer substrates. Silicon-based MEMS components have special physical and electrical properties. While the electrical properties depend substantially on doping, physical properties (in particular thermal conductivity) depend on the crystalline nature of the silicon. Monocrystalline silicon, for example, has the highest thermal conductivity (148 W/mK).
Many semiconductor processes require epitaxial growth of a silicon layer onto a substrate wafer or an insulation layer such as an oxide or nitride. While epitaxy on a monocrystalline silicon layer results in monocrystalline growth, epitaxy does not function directly on an amorphous layer such as an oxide or nitride. In such a case it is instead necessary firstly to deposit a seed layer. But because the seed layer cannot be generated in monocrystalline fashion, epitaxy on an oxide also results in a polycrystalline silicon layer.
Layer systems such as a monocrystalline Si/oxide/polycrystalline Si can thus be manufactured without difficulty. It is not possible to manufacture a layer system of polycrystalline silicon/oxide/monocrystalline silicon/oxide/polycrystalline silicon using epitaxy or alternative depositions.
It is known (e.g. from DE 3587210 T2 or EP 0 179 491 B1) to manufacture a monocrystalline Si layer from polycrystalline silicon by laser recrystallization. Special requirements are imposed in this context, however, in terms of the thermal conductivity of the individual layers. Thickness uniformity is moreover limited by the uniformity of the polycrystalline layer.
Silicon direct bonding has been known since 1986 (see e.g. Applied Physics Letters 48, No. 1, 1986, pp. 78-80). Here two wafers are brought into contact under high pressure. Silicon direct bonding also allows layer systems to be bonded directly, for example monocrystalline silicon with polycrystalline silicon or monocrystalline silicon/oxide with polycrystalline silicon, as well as monocrystalline silicon/oxide with monocrystalline silicon. With this method it is also possible to manufacture SOI wafers made of a monocrystalline substrate water, an oxide layer, and a monocrystalline functional layer with little layer thickness fluctuation.
A known alternative to back-side thinning of the silicon substrate by polishing or etching is offered by the “smart cut” method (see, e.g., U.S. Pat. No. 5,374,564). Here a disruption layer is generated at the desired location in the substrate by hydrogen ion implantation; upon subsequent heating, that layer results in cracks so that the wafer can be spalled or split off in that region.